Details
Title | Low Power Voltage Controlled Oscillator in 65 nm CMOS: магистерская диссертация: 11.04.02 |
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Creators | Mohammed Harbi Adhab |
Scientific adviser | Korotkov Alexander S. |
Organization | Peter the Great St. Petersburg Polytechnic University |
Imprint | Санкт-Петербург, 2017 |
Collection | Выпускные квалификационные работы ; Общая коллекция |
Subjects | Осцилляторы ; 65 nm CMOS Technology ; Voltage Controlled Oscillators ; PLL ; Low Power |
UDC | 681.11.032.1(043.3) |
Document type | Master graduation qualification work |
File type | |
Language | English |
Level of education | Master |
Speciality code (FGOS) | 11.04.02 |
Speciality group (FGOS) | 110000 - Электроника, радиотехника и системы связи |
DOI | 10.18720/SPBPU/2/v17-4842 |
Rights | Доступ по паролю из сети Интернет (чтение, печать, копирование) |
Record key | RU\SPSTU\edoc\45851 |
Record create date | 10/24/2017 |
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Network | Internet |
A low power 10 GHz cross-coupled LC NMOS voltage-controlled oscillator VCO for Cognitive Radio, Multi-standard wireless LAN 802.11a/b/gis designed in 65 nm CMOS processes. It consists of across-coupled NMOS and LC tank circuit. To produce a good tuning range and reduce losses in the tank circuit, an on-chip inductors and capacitors are used with a better quality factor.The design of broadband VCOs presents a considerable challenge, since it is extremely difficult to obtain a wide tuning range along with low power consumption. The CMOS technology scaling is further complicating the design of wideband VCOs The 10 GHz LC VCO achieves a phase noise value of -106.9 dBc/Hz at 1 MHz offset and a tuning range of 9.5 to 10.5 GHz. It dissipates 3.5 mW power at 1 V supply voltage and the figure of merit is calculated as -181.5 dBc/Hz.Other measurements for the phase noise are - 31.5 dBc/Hz, - 60.4 dBc/Hz, - 85.7 dBc/Hz, 116.6 dBc/Hz and -127.1 dBc/Hz at 1kHz, 10 kHz, 100kHz, 3MHz and 10 MHz offset respectively. Frequency drift over temperature variations is a crucial design consideration for VCO circuits in 3G/LTE cellular systems because on-chip inductor resistances and capacitances are highly sensitive to temperature fluctuations, so the temperature variations effect is investigated in the temperature range (-40o C to +85o C) and it was found as 1.1 %, 21.6 %, and 3.6 % for output frequency, output voltage and NMOS transistor current respectively.
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