Details

Title: Low Power Digitally Controlled Oscillator in 65 nm CMOS Technology: магистерская диссертация: 11.04.02
Creators: Omar Jalal Al-Karkhi
Scientific adviser: Korotkov Alexander S.
Organization: Peter the Great St. Petersburg Polytechnic University
Imprint: Санкт-Петербург, 2017
Collection: Выпускные квалификационные работы; Общая коллекция
Subjects: Осцилляторы; 65 nm CMOS Technology; AD-PLL; Digitally Controlled Oscillators
UDC: 681.11.032.1(043.3)
Document type: Master graduation qualification work
File type: PDF
Language: English
Level of education: Master
Speciality code (FGOS): 11.04.02
Speciality group (FGOS): 110000 - Электроника, радиотехника и системы связи
DOI: 10.18720/SPBPU/2/v17-4843
Rights: Доступ по паролю из сети Интернет (чтение, печать, копирование)
Record key: RU\SPSTU\edoc\45855

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Differential digital Ring Oscillator (DRO) is the block that dominates the overall performanceof the AD-PLL. It is the responsible for most of the lower power consumption, less area, lower phase noise, better frequency stability with variation of applied voltage and with investigation of temperature change effect on the oscillation frequency. In this work it is studied and projected a fully dual band differential ring Oscillator (DRO) implementation technique with the purposeof producing an extended and linear frequency range.

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